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5-channel, 1 kv unidirectional digital isolator ADUM7510 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010 analog devices, inc. all rights reserved. features rohs-compliant, 16-lead, qsop package low power operation: 5 v 1.2 ma per channel maximum @ 0 mbps to 2 mbps 2.8 ma per channel maximum @ 10 mbps high temperature operation: 105c up to 10 mbps data rate (nrz) low default output state 1000 v rms isolation rating safety and regulatory approvals (pending) ul recognition 1000 v rms for 1 minute per ul 1577 applications general-purpose, unidirectional, multichannel isolation functional block diagram encode decode encode decode encode decode encode decode encode decode v dd1 gnd 1 v ia v ib v ic v id v ie v dd2 gnd 2 v oa v ob v oc v od v oe 1 16 2 15 3 14 4 13 5 12 6 11 7 10 gnd 1 gnd 2 8 9 07632 ADUM7510 -001 , figure 1. general description the ADUM7510 1 is a unidirectional 5-channel isolator based on the analog devices, inc., i coupler? technology. in contrast to the adum1510, the ADUM7510 has a lower isolation rating offering a reduced cost option for applications that can accept a 1 kv ac isolation. combining high speed cmos and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices. by avoiding the use of leds and photodiodes, i coupler devices eliminate the design difficulties commonly associated with opto- couplers. the typical optocoupler concerns regarding uncertain current transfer ratios, nonlinear transfer functions, and temperature and lifetime effects are eliminated with the simple i coupler digital interfaces and stable performance characteristics. the need for external drivers and other discrete components is eliminated with these i coupler products. furthermore, i coupler devices run at one-tenth to one-sixth the power consumption of optocouplers at comparable signal data rates. the ADUM7510 isolator provides five independent isolation channels supporting data rates up to 10 mbps. each side operates with the supply voltage of 4.5 v to 5.5 v. unlike other optocoupler alternatives, the ADUM7510 isolator has a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/power-down conditions. 1 protected by u.s. patents 5,952,849; 6, 873,065; and 7,075,329. o ther patents pending.
ADUM7510 rev. a | page 2 of 12 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics5 v operation................................ 3 ? package characteristics ............................................................... 4 ? insulation and safety-related specifications ............................ 4 ? recommended operating conditions ...................................... 4 ? regulatory information ............................................................... 4 ? absolute maximum ratings ............................................................ 5 ? esd caution...................................................................................5 ? pin configuration and function descriptions ..............................6 ? typical performance characteristics ..............................................7 ? applications information .................................................................8 ? printed circuit board (pcb) layout ..........................................8 ? propagation delay-related parameters ......................................8 ? dc correctness and magnetic field immunity ..............................8 ? power consumption .....................................................................9 ? power-up/power-down considerations ...................................9 ? outline dimensions ....................................................................... 10 ? ordering guide .......................................................................... 10 ? revision history 1/10revision a: initial version
ADUM7510 rev. a | page 3 of 12 specifications electrical characteristics5 v operation all voltages are relative to their respective ground. 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v; all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted; all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. table 1. parameter symbol min typ max unit test conditions dc specifications input quiescent supply current per channel i ddi (q) 0.4 0.7 ma output quiescent supply current per channel i ddo (q) 0.3 0.5 ma total supply current, five channels 1 v dd1 supply current, quiescent i dd1 (q) 2.0 3.5 ma v ia = v ib = v ic = v id = v ie = 0 v v dd2 supply current, quiescent i dd2 (q) 1.5 2.5 ma v ia = v ib = v ic = v id = v ie = 0 v v dd1 supply current, 10 mbps data rate i dd1 (10) 7.7 10 ma 5 mhz logic signal frequency v dd2 supply current, 10 mbps data rate i dd2 (10) 3.3 4.0 ma 5 mhz logic signal frequency input currents i ia , i ib , i ic , i id , i ie ?10 +1 +10 a v ia , v ib , v ic , v id , v ie 0 v logic high input threshold v ih 2.0 v logic low input threshold v il 0.8 v logic high output voltages v oah , v obh , v och , v odh , v oeh v dd2 ? 0.4 4.8 v i ox = ?4 ma, v ix = v ih logic low output voltages v oal , v obl , v ocl , v odl , v oel 0.2 0.4 v i ox = +4 ma, v ix = v il switching specifications minimum pulse width 2 pw 100 ns c l = 15 pf, cmos signal levels maximum data rate 3 10 mbps c l = 15 pf, cmos signal levels propagation delay 4 t phl , t plh 20 27 40 ns c l = 15 pf, cmos signal levels pulse-width distortion, |t plh ? t phl | 4 pwd 5 ns c l = 15 pf, cmos signal levels change vs. temperature 5 ps/c c l = 15 pf, cmos signal levels propagation delay skew 5 t psk 30 ns c l = 15 pf, cmos signal levels channel-to-channel matching 6 t pskcd 5 ns c l = 15 pf, cmos signal levels output rise/fall time (10% to 90%) t r /t f 2.5 ns c l = 15 pf, cmos signal levels common-mode transient immunity at logic high output 7 |cm h | 10 15 kv/s v ix = v dd1 /v dd2 , v cm = 1000 v, transient magnitude = 800 v common-mode transient immunity at logic low output 7 |cm l | 10 15 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v refresh rate f r 1.2 mbps input dynamic supply current per channel 8 i ddi (d) 0.14 ma/mbps output dynamic supply current per channel 8 i ddo (d) 0.045 ma/mbps 1 supply current values are for all five ch annels combined, running at identical data rates. output supply current values are sp ecified with no output load present. the supply current associated with an individual ch annel, operating at a given data rate, ca n be calculated as described in the pow er consumption section. see figure 4 through figure 6 for information on the per-ch annel supply current as a function of the data rate for unload ed and loaded condi tions. see figure 7 and figure 8 for total i dd1 and i dd2 supply currents as a function of the data rate for the ADUM7510. 2 the minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. operation bel ow the minimum pulse width is not recommended. 3 the maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 t phl propagation delay is measured from the 50% level of the falling edge of the v ix signal to the 50% level of the falling edge of the v ox signal. t plh propagation delay is measured from the 50% level of the rising edge of the v ix signal to the 50% level of the rising edge of the v ox signal. 5 t psk is the magnitude of the worst-case difference in t phl and/or t plh that is measured between units at the same operating temperat ure, supply voltages, and output load within the recommended operating conditions. 6 channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels within the same component. 7 cm h is the maximum common-mode voltage slew rate that can be sustained while maintaining v o > 0.8 v v dd2 . cm l is the maximum common-mode voltage slew rate that can be sustained while maintaining v o < 0.8 v. the common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. the transient magnitude is the range over which the common mode is slewed. 8 dynamic supply current is the incremental amo unt of supply current required for a 1 m bps increase in the signal data rate. see figure 4 through figure 6 for infor- mation on the per-channel supply current as a function of the data rate for unloaded and loaded conditions. see the power consu mption section for guidance on calculating the per-channel supply current for a given data rate.
ADUM7510 rev. a | page 4 of 12 package characteristics table 2. parameter symbol min typ max unit test conditions resistance (input-to-output) 1 r i-o 10 12 capacitance (input-to-output) 2 c i-o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction-to-ambient thermal resistance, qsop ja 76 c/w thermocouple located at center of package underside 1 the device is considered a 2-terminal device. pin 1 through pin 8 are shorted together, and pin 9 through pin 16 are shorted t ogether. 2 input capacitance is from any input data pin to ground. insulation and safety-related specifications table 3. parameter symbol value unit conditions rated dielectric insulation voltage 1000 v rms 1 minute duration minimum external air gap qsop package (clearance) l(i01) 3.8 min mm measured from input termin als to output terminals, shortest distance through air minimum external tracking qsop package (creepage) l(i02) 3.8 min mm measured from input termin als to output terminals, shortest distance path along body tracking resistance (comparative tracking index) cti >400 v din iec 112/vde 0303 part 1 isolation group ii material group (din vde 0110, 1/89, table 1) maximum working voltage compatible with 50 years service life v iorm 354 v peak continuous peak voltage across the isolation barrier recommended operat ing conditions all voltages are relative to their respective ground. see the dc correctness and magnetic field immunity section for information on immunity to external magnetic fields. table 4. parameter symbol min max unit operating temperature t a ?40 +105 c supply voltages v dd1 , v dd2 4.5 5.5 v input signal rise and fall times 1.0 ms regulatory information the ADUM7510 is approved by the organization listed in tabl e 5 . table 5. ul (pending) recognized under ul 1577 component recognition program 1 single/basic insulation, 1000 v rms isolation voltage file e214100 1 in accordance with ul 1577, each ADUM7510 is proof tested by applying an insulation test voltage of 1200 v rms for 1 sec (curr ent leakage detection limit = 5 a).
ADUM7510 rev. a | page 5 of 12 absolute maximum ratings ambient temperature t a = 25c, unless otherwise noted. table 6. parameter rating storage temperature (t st ) range ?65c to +150c ambient operating temperature (t a ) range ?40c to +105c supply voltages 1 (v dd1 , v dd2 ) ?0.5 v to +7.0 v input voltages 1 (v ia , v ib , v ic , v id , v ie ) ?0.5 v to v ddi + 0.5 v output voltages 1 (v oa , v ob , v oc , v od , v oe ) ?0.5 v to v ddo + 0.5 v average output current per pin 2 side 1 (i o1 ) ?10 ma to +10 ma side 2 (i o2 ) ?10 ma to +10 ma common-mode transients 3 ?100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 see figure 3 for maximum rated current values for various temperatures. 3 refers to common-mode transients across the insulation barrier. common- mode transients exceeding the abso lute maximum ratings may cause latch- up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ADUM7510 rev. a | page 6 of 12 pin configuration and fu nction descriptions v dd1 1 gnd 1 * 2 v ia 3 v ib 4 v dd2 16 gnd 2 * 15 v oa 14 v ob 13 v ic 5 v oc 12 v id 6 v od 11 v ie 7 v oe 10 gnd 1 * 8 ADUM7510 top view (not to scale) gnd 2 * 9 * pin 2 and pin 8 are internally connected. connecting both to gnd 1 is recommended. pin 9 and pin 15 are internally connected. connecting both to gnd 2 is recommended. 7632-002 0 figure 2. pin configuration table 7. pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1 (4.5 v to 5.5 v). 2 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 8 are internally connected, and connecting both to gnd 1 is recommended. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 v ie logic input e. 8 gnd 1 ground 1. ground reference for isolator side 1. pin 2 and pin 8 are internally connected, and connecting both to gnd 1 is recommended. 9 gnd 2 ground 2. ground reference for isolator side 2. pin 9 and pin 15 are internally connected, and connecting both to gnd 2 is recommended. 10 v oe logic output e. 11 v od logic output d. 12 v oc logic output c. 13 v ob logic output b. 14 v oa logic output a. 15 gnd 2 ground 2. ground reference for isolator side 2. pin 9 and pin 15 are internally connected, and connecting both to gnd 2 is recommended. 16 v dd2 supply voltage for isolator side 2 (4.5 v to 5.5 v). table 8. truth table (positive logic) v ix input 1 , 2 v dd1 state v dd2 state v ox output 1 description high powered powered high normal operation, data is high. low powered powered low normal operation, data is low. x unpower ed powered low input unpowered. outputs return to input state within 1 s of v dd1 power restoration. see the power-up/power-down considerations section for more details. x powered unpowered high-z output unpowered. output pins are in high imp edance state. outputs return to input state within 1 s of v dd2 power restoration. 1 v ix and v ox refer to the input and output signals of a given channel (a, b, c, d, or e). 2 x = dont care.
ADUM7510 rev. a | page 7 of 12 632-003 typical performance characteristics 07 0 50 100 150 200 250 300 350 0 25 50 75 100 125 150 175 maximum current (ma) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 24681 0 data rate (mbps) i dd2 current/channel 15pf load (ma) 07632-006 ambient temperature (c) figure 3. thermal derating curve, dependence of safety-limiting values with case temperature per din v vde v 0884-10 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 figure 6. typical i dd2 supply current per ch annel vs. data rate (15 pf output load) 8 7 6 5 4 3 2 1 0 0 24681 0 data rate (mbps) i dd1 current (ma) 07632-007 0 0 24681 0 i dd1 current/channel (ma) 7632-004 data rate (mbps) 0 figure 4. typical i dd1 supply current per ch annel vs. data rate 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 i dd2 current/channel (ma) figure 7. typical total i dd1 supply current vs. data rate 8 7 6 5 4 3 2 1 0 024681 0 data rate (mbps) i dd2 current 15pf load (ma) 632-008 07 figure 8. typical total i dd2 supply current vs. data rate (15 pf output loads) 0 0 24681 0 data rate (mbps) 07632-005 figure 5. typical i dd2 supply current per ch annel vs. data rate (no output load)
ADUM7510 rev. a | page 8 of 12 applications information printed circuit board (pcb) layout the ADUM7510 digital isolator requires no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (see figure 9 ). bypass capacitors are most conveniently connected between pin 1 and pin 2 for v dd1 and between pin 15 and pin 16 for v dd2 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin should not exceed 10 mm. bypassing between pin 1 and pin 8 and between pin 9 and pin 16 should also be considered unless the ground pair on each package side is connected close to the package. v dd1 gnd 1 v ia v ib v ic v id v dd2 gnd 2 v oa v ob v oc v od v ie gnd 1 v oe gnd 2 ADUM7510 0 7632-0 09 figure 9. recommended pcb layout propagation delay-related parameters propagation delay is a parameter that describes the length of time it takes for a logic signal to propagate through a component. the propagation delay to a logic low output can differ from the propagation delay to a logic high output. input ( v ix ) t plh t phl output (v ox ) 50% 50% 07632-0 10 figure 10. propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signal timing is preserved. channel-to-channel matching refers to the maximum amount the propagation delay differs between channels within a single ADUM7510 component. propagation delay skew refers to the maximum amount the propagation delay differs among multiple ADUM7510 com- ponents operated under the same conditions. dc correctness and magnetic field immunity positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent via the transformer to the decoder. the decoder is bistable and is, therefore, either set or reset by the pulses indicating input logic transitions. in the absence of logic transitions at the input for more than ~1 s, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. if the decoder receives no pulses for more than about 5 s, the input side is assumed to be unpowered or nonfunctional, in which case, the isolator output is forced to a default low state by the watchdog timer circuit (see table 8 ). the limitation on the magnetic field immunity of the device is set by the condition in which induced voltage in the transformer receiving coil is sufficiently large to either falsely set or reset the decoder. the following analysis defines such conditions. the ADUM7510 is examined in a 4.5 v operating condition because it represents the most susceptible mode of operation of this product. the pulses at the transformer output have an amplitude greater than 1.5 v. the decoder has a sensing threshold of about 1.0 v, thereby establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = (? d / dt )? r n 2 ; n = 1, 2, , n where: is the magnetic flux density. r n is the radius of the n th turn in the receiving coil. n is the number of turns in the receiving coil. given the geometry of the receiving coil in the ADUM7510 and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated, as shown in figure 11 . 1000 100 10 1 0.1 0.01 0.001 1k 10k 100k 1m 10m 100m magnetic field frequency (hz) maximum allowable magnetic flux (kgauss) 07632-011 figure 11. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.5 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. if such an event occurs with the worst-case polarity during a transmitted pulse, it reduces the received pulse from >1.0 v to 0.75 v, still well above the 0.5 v sensing threshold of the decoder.
ADUM7510 rev. a | page 9 of 12 the preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the ADUM7510 transformers. figure 12 expresses these allowable current magni- tudes as a function of frequency for selected distances. the ADUM7510 is very insensitive to external fields. only extremely large, high frequency currents, very close to the component can potentially be a concern. for the 1 mhz example noted, a 1.2 ka current must be placed 5 mm away from the ADUM7510 to affect component operation. 1000 100 10 1 0.1 maximum allowable current (ka) 0.01 1k 10k 100k 1m 10m 100m magnetic field frequency (hz) 07632-012 distance = 5mm distance = 100mm distance = 1m figure 12. maximum allowable current for various current to ADUM7510 spacings note that at combinations of strong magnetic field and high frequency, any loops formed by pcb traces can induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. take care to avoid pcb structures that form loops. power consumption the supply current at a given channel of the ADUM7510 isolator is a function of the supply voltage, the channel data rate, and the channel output load. for each input channel, the supply current is given by i ddi = i ddi (q) f 0.5 f r i ddi = i ddi (d) (2 f ? f r ) + i ddi (q) f > 0.5 f r for each output channel, the supply current is given by i ddo = i ddo (q) f 0.5 f r i ddo = ( i ddo (d) + (0.5 10 ?3 ) c l v ddo ) (2 f ? f r ) + i ddo (q) f 0.5 f r where: i ddi (d) , i ddo (d) are the input and output dynamic supply currents per channel (ma/mbps). c l is the output load capacitance (pf). v ddo is the output supply voltage (v). f is the input logic signal frequency (mhz, half of the input data rate, nrz signaling). f r is the input stage refresh rate (mbps). i ddi (q) , i ddo (q) are the specified input and output quiescent supply currents (ma). to calculate the total i dd1 and i dd2 supply current, the supply currents for each input and output channel corresponding to i dd1 and i dd2 are calculated and totaled. figure 4 and figure 5 provide per-channel supply currents as a function of the data rate for an unloaded output condition. figure 6 provides per- channel supply current as a function of the data rate for a 15 pf output condition. figure 7 and figure 8 provide total i dd1 and i dd2 supply current as a function of the data rate for ADUM7510 products. power-up/power-down considerations the ADUM7510 behaves as specified in tabl e 8 during power- up and power-down operations. however, the part can transfer incorrect data when the power supplies are below the minimum operating voltage but the internal circuits are not completely off. power-up/power-down errors can occur at v ddx voltage near the operating threshold of 1.9 v. the encoder generates data pulses at low amplitude. the detector can miss data pulses that are near the detection threshold. if the transferring state is a logic high, the encoder generates a pair of pulses; the decoder can reject one of the pulses for low amplitude. a single pulse is interpreted as a logic low, and the output can be placed in the wrong logic state for that refresh cycle. glitch-free operation is possible by following these recommendations. ? slew the power on or off as quickly as possible. ? use the default low operating mode by holding the inputs low until power is stable.
ADUM7510 rev. a | page 10 of 12 012808-a controlling dimensions are in inches; millimeters dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. outline dimensions compliant to jedec standards mo-137-ab 16 9 8 1 seating plane 0.010 (0.25) 0.004 (0.10) 0.012 (0.30) 0.008 (0.20) 0.025 (0.64) bsc 0.041 (1.04) ref 0.010 (0.25) 0.006 (0.15) 0.050 (1.27) 0.016 (0.41) 0.020 (0.51) 0.010 (0.25) 8 0 coplanarity 0.004 (0.10) 0.065 (1.65) 0.049 (1.25) 0.069 (1.75) 0.053 (1.35) 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) figure13. 16-lead shrink small outline package [qsop] (rq-16) dimensions shown in inches and (millimeters) ordering guide model 1 number of inputs, v dd1 side number of inputs, v dd2 side maximum data rate maximum propagation delay, 5 v maximum pulse width distortion temperature range package description package option ADUM7510brqz , 5 0 10 mbps 40 ns 5 ns ?40 c to +105 c 16-lead qsop rq-16 ADUM7510brqz-rl7 2 5 0 10 mbps 40 ns 5 ns ?40 c to +105 c 16-lead qsop rq-16 1 z = rohs compliant part. 2 rl7 = 7 tape and reel option.
ADUM7510 rev. a | page 11 of 12 notes
ADUM7510 rev. a | page 12 of 12 notes ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07632-0-1/10(a)

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